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// Generated by Quartus Prime Version 24.1 (Build Build 1077 03/04/2025)
// Created on Fri May  2 07:14:00 2025

UartRxTop UartRxTop_inst
(
	.clk(clk_sig) ,	// input  clk_sig
	.fifo_rd_pop(fifo_rd_pop_sig) ,	// input  fifo_rd_pop_sig
	.rx_pin(rx_pin_sig) ,	// input  rx_pin_sig
	.fifo_rd_pop_data(fifo_rd_pop_data_sig) ,	// output [7:0] fifo_rd_pop_data_sig
	.fifo_rd_empty(fifo_rd_empty_sig) 	// output  fifo_rd_empty_sig
);

defparam UartRxTop_inst.FIFOSIZE = 16;
defparam UartRxTop_inst.OVERSAMPLING = 16;
